This turned out to be fun. My East Coast content expert pushed me in the directions I like to go.
ADVance™ MS
DATASHEET
Visual: Something that brings together analog and digital, top-down and bottom-up, with a sprinkling of language names and techniques.
Caption: ADVance™ MS is a language-neutral, mixed-signal simulator that enables top-down design and bottom-up verification for multi-million gate analog/mixed-signal circuits and System on Chip designs.
Features:
Three high performance, customer-proven simulation
engines: ELDO™ for complete analog, ModelSim™ for digital,
and Mach™ for transistor-level simulations
Benefits:
Language-neutral environment with multiple simulation
algorithms lets designers chose the best combination for their tasks
ADVance MS Simulator Provides a Comprehensive Environment for Analog/Mixed Signal Designers
The Mentor Graphics ADVance™ MS simulator gives designers the comprehensive environment they need to develop complex analog/mixed-signal circuits (AMS) and System on Chip (SoC) designs. ADVance MS combines the advantages of three high performance simulation engines in one easy interface: ELDO™ for general purpose, large signal model simulations, ModelSim™ for efficient digital simulations, and Mach™ for fast transistor-level simulations.
The ADVance MS single kernel architecture eliminates IPC/backplane overhead while providing a unified simulation cycle and a single all-inclusive database. It uses a single netlist hierarchy and is language-neutral, allowing designers to freely combine VHDL, Verilog, VHDL-AMS, Verilog-A(MS), SPICE, and C anywhere in their designs. The ADMS-Mach ELDO engine allows the accurate simulation of large portions at the transistor level and fast post-layout verification with transistors and RC’s.
ADVance MS features the familiar ModelSim GUI and is fully integrated with Cadence’s Analog Artist, Mentor Graphics’ own Design Architect®-IC, and stand-alone SPICE netlists using the ModelSim interface. The availability of the CommLib™ mixed-signal library of reusable Telecommunications IP makes it easy to simulate abstract design and make accurate models of analog blocks.
The need for ADVance MS’s tools and techniques
Traditional ways of developing AMS circuits and SoCs hold designers back from meeting contemporary challenges. New analog designs often include substantial mixed-signal content that needs accurate interfacing and interaction between the analog and digital portions. Mixed-signal SoCs depend on tightly integrated analog blocks such as analog-to-digital converters, digital-to-analog converters, phase-locked loops, and adaptive filters.
Older SPICE tools and techniques force designers to develop analog and digital subsystems in isolation. Since subsystems aren’t joined until IC layout, they can’t be tested together until the silicon returns from fabrication. That is an extremely expensive time to discover an inverted bus signal or a faulty interaction between the analog and digital portions.
To keep pace, analog and mixed-signal designers need the same kind of tool integration that digital designers already enjoy. Hardware description languages (HDLs) and behavioral models automate much of the digital process. Their designers use top-down design and bottom-up techniques as a systematic approach to complex designs. Testing at higher levels lets them expose system-level flaws early on when they are easier and less expensive to correct.
What has held up the automation of complex AMS design has been has been a lack of similar incremental tools and integration.
Exploring the gaps in A/MS signal design
Figure 1: The Gap from Pratt’s article and the slide show.
1. The entire digital-design process is automated through top-down design and bottom-up verification. Analog/mixed-signal design automation has suffered from the lack of tool support between system-level specification and transistor-level implementation and on to fabrication.
Consider the design overviews shown in Figure 1. There are significant holes in the A/MS design and verification process between system-level specification and transistor-level implementation. These gaps slow the development of complex A/MS designs and raise their cost. ADVance MS bridges these gaps in the design flow.
Advance MS Simulator Closes the Gaps in Automated Design
Figure 2: I would really like a controlling diagram of how ADVance MS is used. Sadly, I’m not competent to describe it. I’d like to see SOMEONE sketch one out and give me the chance to adapt text to fit. My guesses are below.
2. ADVance MS takes advantage of new incremental tools and techniques to provide a fast, efficient environment for top down design and bottom up verification for analog and mixed-signal devices.
Top-down Design
Efficient IC design flow begins with system engineers who perform system architectural and algorithmic investigations using C, Matlab, paper designs and HDLs. They create abstract models of each top-level module, using RTL for digital blocks and abstract analog models for analog blocks.
They then pass the design down to the detailed design teams as a "working" specification in a form that the teams can use and in languages that the teams can understand. ADVance MS’s language neutral capabilities facilitate global partnerships and outsourcing. The original language of system design or IP model no longer holds back development.
While the digital design team works toward synthesis, the analog team’s goal is a transistor-level design. The detailed designers decompose the system design into larger and larger numbers of blocks containing more and more detail, until the design has been verified at the most detailed level. At each step, the design is carefully compared to its previous step to assure that requirements are met throughout the process. When the blocks contain the necessary detail, the analog engineer converts each block to the transistor level.
Bottom-up Verification
The behavioral models continue to play a crucial role in bottom-up verification. Each block must meet its specification. Digital blocks are correct by construction. Analog blocks, however, require testing of implementation-specific vulnerabilities in addition to functional testing. Block abstraction is unique to analog design.
ADVance MS allows the creation of abstract analog models that exhibit the same characteristics as the transistor level blocks. Mentor’s CommLib™ model library provides hundreds of parameterized AMS models that can be calibrated for accurate simulation. Source code is also available to construct reusable custom models for the team’s own library. Abstract models simulate ten to one thousand times faster than the original blocks.
In checkerboard verification, for example, only the block currently being converted to the transistor level needs to be simulated at the transistor level. The remainder of the circuit continues to be simulated with behavioral models, RTL or abstracted blocks. This way the team can achieve transistor level accuracy where needed while maintaining their simulation orders of magnitude faster than they could with traditional techniques.
Once the blocks have been individually verified and their behavioral models finely calibrated, system verification becomes possible. Using the abstracted models, the team can invoke massive simulations involving mega-vectors, multiple seconds of simulated time, and many corner cases. The result is fast and thorough design verification before the expense of fabrication.
A complete set of powerful A/MS tools
Better Tools
Designers gain all the advantages of digital, analog and mixed-signal standard HDLs and SPICE in a single simulation environment. ADVance MS encompasses ModelSim, Mentor Graphics’ industry-leading digital VHDL/Verilog simulator; Eldo, its popular general-purpose analog simulator; and MACH, Mentor’s high-speed transistor-level simulator. The ADVance MS environment is language neutral, allowing VHDL-AMS, Verilog-AMS, VHDL with Vital, Verilog, SPICE and "C" to be combined anywhere and at any level in the design. These are all proven tools that have shown themselves versatile and totally reliable. Designers can pick the best combination of tools for their task at hand.
They enjoy the same powerful debugging capabilities for both digital and analog parts. Designers have access to all ELDO primitives and to optimized standard ELDO IC device models including BSIM3, VBIC, and HICUM. They can easily perform transient, DC , AC and noise analysis. ADVance MS’s unique architecture ensures a fast, accurate simulation of complex analog and mixed signal designs at any level of abstraction.
Better Results
ADVance MS provides a full solution to the description and simulation of the most complex A/MS circuits and mixed signal SoCs. They can be described and simulated at any level from behavioral to the device level, whether incorporating digital, analog or mixed signal elements. Digital parts simulated by ModelSim can be used in ADVance MS without any modification. SPICE sub-circuits can be used anywhere in the design hierarchy for greater flexibility in modeling. HSPICE compatible SPICE models work without modification. There are close foundry links through popular device models and design kits to keep each step verifiable and complete—from system to silicon.
Familiar interface and smooth integrations simplify learning and use
ADVance MS’ interactive GUI is based on the popular ModelSim interface. It adds the versatile Xelga viewer to display digital logical levels and analog voltages and currents. ADVance MS can be used stand-alone or integrated into two popular schematic driven environments. These integrations protect previous tool investments and enhance their capabilities.
Mentor Graphics Flow
(Figure 3: Screen shot of DA-IC.)
Caption: Mentor Graphics’ DA-IC flow features fast data entry, the rapid creation of functional blocks, and powerful data modeling.
The Mentor Graphics Flow features DA-IC™, Mentor’s new schematic entry tool designed explicitly for the IC designer. ADVance MS integrates with DA-IC using the high-speed hierarchical netlister, EldoNet™. This flow features fast data entry, the rapid creation of function blocks for top down design, and powerful data modeling. Design teams find this flow easy to learn and appreciate the integration with other IC flow tools.
Cadence Flow
(Figure 4: Screen shot of Cadence’s Analog Artist.)
Caption: The Cadence’s flow features the same look and feel as any simulator inside Analog Artist, but gives designers access to all the analysis, commands and options of Mentor Graphic’s industry-leading ELDO.
ADVance MS integrates Mentor Graphics’ Eldo into Cadence’s Analog Artist environment. This achieves the same look and feel as any simulator inside Analog Artist, but gives designers access to all the analysis, commands and options of Eldo. An enhanced symbol library providing specific Eldo devices is compatible with the Cadence library. This protects prior investments in Cadence Composer while integrating Mentor Graphics’ superior simulation tools.
ADVance MS’s stand-alone ModelSim Flow
(Figure 5: Screen shot of ModelSim interface.)
Caption: The stand-alone flow extends ModelSim’s familiar interface with menus, functions and displays for integrated mixed signal model development.
ADVance MS also offers a fully featured, stand-alone flow based on the ModelSim graphical interface. Mentor extends the familiar interface with menus, function and displays for integrated mixed signal model development. Dynamically linked debugging windows help to pin point problems. The structure window provides a hierarchical view of the design. The source window allows viewing and editing of VHDL-AMS source code. The nets window display names and values of signals and quantities of the region on display. The variables window display names and values of the selected process. The process window shows lists of processes identified by their pathname. The wave window displays the simulation results using the Xelga graphical waveform viewer and signal post-processor.
Summary
Mentor Graphics’ ADVance MS provides superior tools for the development of complex analog/mixed-signal circuits and SoC designs. It effectively bridges the tool gaps that have long hindered the mixed-signal design process. It provides effective control to automate the process with true top-down design and bottom-up verification techniques. Its language-neutral design environment and multiple integrations protects previous design work while taking full advantage of the newest, and most effective design and verification tools.
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